Magnetoelectronic devices, spin electronics devices, and spintronics devices are synonymous terms for devices that use effects predominantly caused by electron spin. Magnetoelectronic effects are used in numerous information devices, and provide non-volatile, reliable, radiation resistant, and high-density data storage and retrieval. The numerous magnetoelectronic information devices include, but are not limited to, magnetic random access memory (MRAM), magnetic sensors, and read/write heads for disk drives.
Generally, a magnetoelectronic information device is constructed with an array of memory elements (e.g., giant magnetoresistance (GMR) elements or magnetic tunnel junction (MTJ) elements) formed overlying a substrate that may also include a variety of semiconductor devices, such as, for example, metal-oxide-semiconductor field effect transistors (MOSFETs). The memory elements are programmed by the magnetic field created from current-carrying conductors, typically copper conductors. Two current-carrying copper conductors, one formed underneath the memory element (the digit line) and one formed overlying the memory element (the bit line), are arranged in a cross point matrix to provide magnetic fields for programming of the memory element.
Typically during the fabrication of the memory element array, copper digit lines, which will underlie the memory elements, are formed by a damascene process or inlaid process during which trenches are patterned and etched in a dielectric layer, followed by the deposition of metal within the trenches. Simultaneously with the fabrication of the copper digit lines, copper interconnect lines may also be fabricated using the same damascene process. Each copper interconnect line forms part of an interconnect stack that electrically couples a memory element to a transistor, typically an N-channel field effect transistor (FET).
After fabrication of the copper digit lines and copper interconnect lines, a dielectric material typically is deposited over the digit lines and interconnect lines, and vias are etched to each of the copper interconnect lines of the interconnect stacks. A first electrode layer then may be deposited overlying the dielectric layer and within the vias, followed by the deposition of the magnetic materials that will form the memory element. A second electrode layer may be deposited overlying the magnetic materials and the second electrode layer and the magnetic materials then may be etched to form a memory element that is magnetically coupled to the digit line and electrically coupled to the copper interconnect line.
However, a number of adverse reactions may occur with the above-described method for forming a magnetoelectronic memory element array, each directly related to the use of copper as the interconnect line. One adverse reaction is the corrosion of the magnetic materials by the copper. If the step coverage of the first electrode layer is not adequate within a via, the copper of the underlying interconnect line may be exposed to the magnetic materials of the memory element. When the copper contacts the magnetic materials, a galvanic cell may form and, in the presence of moisture present in the ambient environment, the copper may corrode the magnetic material. Once the corrosion starts, it may spread quickly and, consequently, may destroy a number of memory elements of the array.
In addition, after formation of the memory element array, the memory elements typically are separated from one another by an etching process. Because of the tight tolerances of the fabrication process, it is often difficult to perform the etching process without etching the copper interconnect lines. If there is misalignment in the etching process and the copper is contacted by the etchant, the copper may be damaged by reaction with the etchant.
Another adverse reaction that may result is the destruction of the conductivity of the copper interconnect line due to exposure to an oxygen plasma. Oxygen plasma often is used during various stages of the array fabrication, such as during removal of photoresist after formation of vias. If the copper is contacted by the oxygen plasma, it may be oxidized and, hence, loose its conductive properties.
Yet another adverse reaction results from hillocks that form on the top, exposed surface of the copper lines and layers. Hillocks generally do not pose a problem during semiconductor fabrication because layers overlying the copper interconnect lines typically are of materials that do not react with copper and are thick enough to cover and separate the hillocks from other materials that may cause a reaction. However, during fabrication of a magnetoelectronic memory array, the dielectric layer that separates a copper digit line from the magnetic materials of the memory elements typically is very thin, on the order of about 50 nanometers to 200 nanometers. Because the first electrode layer of the memory element also is relatively thin (i.e., 10 to 100 nanometers), copper hillocks formed on a digit line can be large enough to extend through the dielectric layer and first electrode layer and into the magnetic materials of the memory element and, consequently, corrode the memory elements.
Accordingly, it is desirable to provide a magnetoelectronic memory device that can be manufactured without the undesirable problems described above. Furthermore, other desirable features and characteristics of the present invention will become apparent from the subsequent detailed description of the invention and the appended claims, taken in conjunction with the accompanying drawings and this background of the invention.